Assessing High Frequency Transistor Technologies for Envelope Tracking Systems
Envelope tracking (ET) continues to be one of the main contenders for power amplifier (PA) structures for future communication systems due to its ability to provide efficiency over wide bandwidths and high peak to average power ratios. Unlike conventional broadband PAs however, the power transistors used in ET architectures need to provide the required power, efficiency and linearity over a wide range of supply voltages, and so their performance needs careful consideration. This work considers the different ways to assess and characterise a transistor’s performance in order to establish its suitability and to allow an accurate prediction of performance within an ET environment. Importantly, the effect the dynamic supply voltage has on the transistor’s intrinsic elements, and the resulting impact on both broadband matching networks and gain variation is described in detail. Using these methods, a number of technologies, including Si LDMOS, GaAs pHEMT and GaN HEMT are investigated and predictions are made relating to how they are suited to broadband ET PA architectures.