Circuits and Architectures for Multi-Gb/s mm-Wave and sub-THz Wireless Transceivers in FinFET CMOS

To satisfy the need for higher data rates in next generation communication systems, radio transceivers are targeting mm-wave and sub-THz carrier frequencies to leverage a large available bandwidth as an efficient means to increase network capacity. The low-cost and integration capabilities of CMOS processes make them attractive to deliver solutions for large-scale commercial applications. Scalable, low-cost phased-array implementations are required to preserve the link budget as the carrier frequency scales. Moreover, substantial innovation in radio architecture, circuit design, process technology and packaging is required to be able to deliver energy-efficient solutions at frequencies above 100GHz. This talk focuses on circuit techniques and architecture choices that can leverage the performance of state-of-the-art FinFET process and enable the design of multi-Gb/s phased-array transceivers operating at mm-wave and sub-THz frequencies for next generation communication systems.