A 6.5–12GHz Balanced Variable Gain Low-Noise Amplifier with Frequency-Selective Non-Foster Gain Equalization Technique
This paper presents a wideband balanced variable-gain low-noise amplifier (VGLNA) implemented in a 55-nm CMOS process. A frequency-selective non-foster gain equalization technique is proposed to compensate the gain variation of inter-stage dual-resonant tanks. This VGLNA leverages current-steering technique to realize a phase-invariant 18-dB tunable gain range with a measured input 1-dB gain compression point (IP1dB) at 9 GHz from -12.2 dBm to -5 dBm. The LNA achieves a maximum power gain of 20.2 dB with ±0.5 dB gain variation and a minimum noise figure (NF) of 3.26 dB from 6.5 to 12 GHz. Owing to lumped Lange couplers, the input and output matching are both better than -14 dB. This chip occupies 1.44 mm × 0.68 mm area without pads and consumes 75 mW.