A DC-32GHz 7-Bit Passive Attenuator with Capacitive Compensation Bandwidth Extension Technique in 55nm CMOS
This paper presents a 7-bit wideband passive attenuator with low insertion loss (IL) and high attenuation accuracy from DC to Ka band, designed and fabricated in a 55-nm CMOS technology. Staggered π-type and bridge-T type stages with capacitive compensation are proposed to minimize amplitude and phase errors, and to extend its operation bandwidth. The chip demonstrates a 32.385-dB attenuation range with a 0.255-dB attenuation step and a 3.5–8.4 dB IL across DC to 32 GHz. The measured RMS amplitude and phase errors are below 0.32 dB and 5.33° respectively. The die occupies 0.054 mm² (0.632 mm × 0.086 mm) core area and consumes negligible power. To the best of our knowledge, this work shows the smallest area and the widest bandwidth among the reported switch type attenuators.