Design for Manufacturability in High-Volume Extensively Digital RF Transceivers
The amount of digital content in RF transceivers continues to increase and to benefit from the scaling offered in advanced CMOS processes. In addition to the replacement of building blocks that were historically analog with digital counterparts, the digital processing capabilities also serve to assist the portions of the transceiver that remain analog and suffer from the inevitable variations in their fabrication process, voltage and temperature (PVT). The implementation of built-in calibration/compensation, based on built-in measurements, signal processing and parameter adjustment (voltage, timing, etc), can often make use of existing resources in the extensively-digital SoC, such as data-converters, a processor and memory, thereby representing a zero cost adder. This tutorial presents the fundamentals of this approach and provides several examples of its application to built-in self-calibration and to built-in mitigation of self-interference, leading to reduced production testing costs and high production yields, which are critical in high-volume production.