High-Performance Digital-to-Analog Converter Design Towards A Digital Transmitter

There are increasing interests in wideband and flexible waveform synthesis in modern communication systems. The key enabler in such a digital transmitter is a high performance digital-to-analog converter (DAC). This has motivated the design community to push the digital-to-analog converter (DAC) towards higher sampling rate (>GS/s) while achieving high dynamic range. Moreover, there is an emerging trend to design a DAC with high output power, ie a digital power amplifier (PA). In this talk, I will overview various digital-to-analog architectures and a time-approximation filtering (TAF) technique that push the envelope of DAC bandwidth, linearity and/or noise floor. A dual-rate hybrid DAC architecture is one such example. In addition, I will briefly introduce another digital PA architecture that aims for high power backoff efficiency, namely sub-harmonic switching (SHS) PA. Validated by a series of silicon prototypes, the proposed DAC architectures show a promising path for future digital transmitter.